A number of electronic circuits (such as differential current amplifiers or differential transductance amplifiers) supply balanced output currents, which are converted to single-ended output currents using current mirror amplifiers as balanced-to-single-ended converters. These current mirror amplifiers each have an output current that is the same magnitude as applied input current and flows in the same direction as applied input current. i.e., the current gain of each of these current mirror amplifiers is minus unity.
In some applications it is desirable to be able to control which of the balanced output currents is selected to be inverted and which is not. A representative application is the chopper-stabilized amplifier that is used in the integrator of a delta-sigma modulator.
The delta-sigma modulator is a form of analog-to-digital converter well-known to those skilled in the art of designing such converters. The reader is referred to the following technical articles incorporated herein by reference.
(1) "A Use of Limit Cycle Oscillators to Obtain Robust Analog to Digital Converters", J. G. Candy, IEEE TRANSACTIONS ON COMMUNICATIONS, Vol. COM-27, No. 3, pp. 298-305, March 1974 PA0 (2) "Using Triangularly Weighted Interpolation to Get 13-Bit PCM from a Sigma-Delta Modulator", J. G. Candy, et al., IEEE TRANSACTIONS ON COMMUNICATIONS, Vol. COM-24, No. 11, pp. 1268-1275, November 1976 PA0 (3) "A Use of Double Integration in Signal Delta Modulation", J. G. Candy, IEEE TRANSACTIONS ON COMMUNICATIONS, Vol COM-33, No. 3, pp. 249-258, March 1985 PA0 (4) "Circuit and Technology Considerations for MOS Delta-sigma AID Converters", M. W. Hauser, et al., 1986, IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS PROCEEDINGS, pp. 1310-1315, May 1986 PA0 (5) "A Low-Noise Chopper-Stabilized Differential Switched-Capacitor Filtering Technique", K.-C. Hsieh, et al., IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol. SC-16, No. 6, pp. 708-715, December 1981.
In a delta-sigma modulator an analog input signal has a quantized analog signal subtracted therefrom to generate an error signal. This error signal is integrated over time, and the resulting integral is supplied to a quantizer to be digitized. The quantizer includes means for generating the quantized analog signal as well, such as digital-to-analog converter for the digital signal from the quantizer, completing a direct feedback connection. The delta-sigma modulator is operated at a relatively high sample rate f.sub.s compared to the rate f.sub.out at which an interpolated value of digitized input signal is to be developed as a final output signal of the analog-to-digital converter. The digital output signal from the quantizer of the delta-sigma modulator is then subjected to averaging over cycle of repeated operations of the delta-sigma modulator, f.sub.s /f.sub.out in number. This averaging may be done by accumulating the digital output from the quantizer over (f.sub.s /f.sub.out) operations, then dividing the accumulation by (f.sub.s /f.sub.out) to obtain an interpolated value of the digitized input signal as output signal. This division is a simple matter of binary place shifting when (f.sub.s /f.sub.out) is an integral power of two. This paragraph has described a first-order delta-sigma modulator, with a single integrator included in the direct feedback loop, per the March 1974 J. G. Candy article, being used to implement an oversample and decimate analog to digital converter.
One may view the averaging to obtain the interpolated value of the digitized input signal as being a low-pass digital filtering procedure used to suppress quantizing noise, which is above-band. Low-pass filtering techniques for suppressing quantizing noise that are more sophisticated than the simple accumulate-and-divide technique are known--e.g., from the November 1976 Candy et alii article which describes triangularly weighted kernels for such filtering. With ideal low-pass filtering for suppressing quantizing noise, effectively the number N of bits of resolution in the output signal of the prior-art analog-to-digital converter using a first-order delta-sigma modulator is approximately [1.5 log.sub.2 (f.sub.s /f.sub.out)]-0.9.
In addition to first-order delta-sigma modulators, delta-sigma modulators with additional integrating loops are also possible. This is described in the March 1985 J. G. Candy article.
As pointed out by Hauser et alii, there are many different forms of oversample and decimate analog-to-digital converters, but those of special interest are the ones where the error signal is forced to have single-bit resolution, inasmuch as this avoids the need for precision binary elements in the digital-to-analog converter used to complete the feedback loop. The goal is to obtain maximum precision in the analog-to-digital process with minimal requirement for precision in the circuit elements employed in the analog-to-digital converter.
Hsieh et alii point out that achievement of this goal is furthered by the use of differential chopper-stabilized configurations, particularly in switched-capacitor designs using metal-oxide-semiconductor field effect transistors (MOSFETs) as switches. Chopper stabilization of the differential amplifier in the integrator also translates its low-frequency, or l/f, noise above-band where it is suppressed by the delta-sigma modulator output signal digital filter. A drawback of the Hsieh et alii analog-to-digital converter is its need for balanced push-pull analog input signals. As noted by Hauser et alii, performance of delta-sigma analog-to-digital converters using MOSFET switches is usually constrained by analog circuit imperfections.
The design problem posed to the present inventors was to develop a fully integrated delta-sigma analog-to-digital converter that is capable of accepting an input signal that lies between the confines of a single-ended power supply and generating responsive to this input signal a single-bit data stream switching between the confines of that power supply, which data stream has an average absolute value equal to the average absolute value of the input signal. The converter is required to withstand input voltages extending outside the normal range of 0 to -5 volts by as much as an additional -25 volts. The analog-to-digital converter is required to have less than 0.5% gain error owing to element mismatch and to exhibit no more than 0.5 mV offset error. This latter requirement is an especially rigorous one to meet and mandates the use of some sort of error compensation, such as that afforded by chopper stabilization of the integrating amplifier. However, the means for chopper stabilizing single-ended (as opposed to balanced) amplifiers using single-ended (as opposed to balanced) power supplies requires a substantial advance in the art from the balanced differential chopper-stabilized configurations as exemplified by Hsieh et alii.
C. F. Wheatley in U.S. Pat. No. 3,614,645 issued Oct. 19, 1971 and entitled "DIFFERENTIAL AMPLIFIER" describes an operational transconductance amplifier that employs transconductance amplifiers rather than the voltage amplifiers employed in prior-art operational (voltage) amplifiers. Input impedances of the operational transconductance amplifiers are high, just as in operational voltage amplifiers, but output impedances are also high rather than low as in operational voltage amplifiers. The typical operational transconductance amplifier structure comprises a long-tailed pair input stage supplying balanced signal currents to a balanced-input/balanced-output current mirror amplifier supplying balanced signal currents to the input and output connections of a current mirror amplifier operated as a balanced to single-ended converter. The balanced-input/balanced-output current mirror amplifier is sometimes realized as two separate current mirror amplifiers, one for each of the balanced signals from the long-tailed pair. The operational transconductance amplifier (OTA) is well suited for use as an integrating amplifier, wherein the OTA non-inverting input terminal is connected to a reference potential against which input voltage is to be measured, wherein the OTA inverting input terminal is connected to input signal voltage via a resistor that responds to the input signal voltage to conduct an input signal current, and wherein an integrating capacitor is connected in a degenerative feedback path from the OTA output terminal to the OTA inverting input terminal. This form of integrating amplifier is that selected for the delta-sigma modulator, and the problem of chopper-stabilizing a single-ended integrating amplifier is accordingly focussed to the more-closely-defined problem of chopper-stabilizing an operational transconductance amplifier.
Delta-sigma modulators are well-suited to construction in monolithic integrated circuits employing metal-oxide-semiconductor (CMOS) transistors, and chopper-stabilized operational transconductance amplifiers that are constructed in that monolithic integrated-circuitry technology are of particular interest. Operational transconductance amplifiers constructed in CMOS technology are described by M. Milkovic, the present inventor, in the paper "Current Gain High-Frequency CMOS operational Amplifiers" in the IEEE JOURNAL OF SOLID STATE CIRCUITS, Vol. SC-20, No. 4, pp. 845-851, published in August 1985; the OTA shown in FIG. 10 of that article can be chopper-stabilized in accordance with the invention.
Presuming the operational transconductance amplifier is to be powered from a single-ended power supply between a reference voltage at substrate ground and a positive power supply voltage, and presuming that it is desired to operate the input of the operational transconductance amplifier single-ended against that substrate ground potential, it is desirable that the OTA have the capability of accepting input voltage swings that are negative as well as positive referred to substrate ground potential. O. H. Schade, Jr., in U.S. Pat. No. 4,360,785 issued Nov. 23, 1982 and entitled "TRANSISTOR AMPLIFIERS EXHIBITING LOW INPUT OFFSET POTENTIALS" describes enhancement-mode p-channel field-effect transistors in long-tailed pair connection being used in the input stage of a monolithic integrated circuit constructed on a p-type silicon substrate. The p-channel field effect transistors permit input signals to swing below ground potential in a monolithic integrated circuit constructed on a p-type silicon substrate connected to ground potential, despite the electronic circuitry being provided with at least one positive power supply voltage but not any negative power supply voltage. The Schade, Jr., monolithic integrated circuitry was constructed in a technology permitting n-p-n bipolar transistors, so the application of output currents from the long-tailed-pair connection of the enhancement-mode p-channel field-effect transistors to further amplifier stages could be done in a straight forward manner. When a chopper-stabilized operational transconductance amplifier embodying the present invention is operated with single-ended power supply and is constructed in a CMOS technology that is optimized for complementary symmetry of the operating characteristics of p-channel and n-channel enhancement-mode field effect transmissions, a substantial modification of the Schade, Jr., teaching in regard to p-channel field-effect transistor input stages must be made to accomodate n-channel enhancement-mode field effect transistors rather than n-p-n bipolar transistors being available for use in succeeding stages.